CLOCKS

Clock Clock

When to Use a Clock vs. an Oscillator

Introduction

A wide range of timing solutions are available, including crystal oscillators (XO), voltage-controlled crystal oscillators (VCXO), and clocks. No one size fits all strategy applies when it comes to component selection. Picking the right device for a particular application is dependent on a number of factors, including whether or not the clocks must be synchronized to an externally provided reference clock, the system architecture of the processor and high speed serial data transmission ICs, and the frequency and jitter requirements of the end application. In high performance applications, low jitter and low phase noise are critical given that they have a direct impact on the bit-error rate in high speed serial data transmission applications and the signal-to-noise ratio of analog to digital data converters.

Hardware design in high performance applications such as networking, wireless/RF transmission, broadcast video and test and measurement is becoming increasingly complex as hardware designers grapple with the need to support a growing number of standards, protocols, and specifications within a single hardware design. A few examples illustrate this trend. The latest networking gear is being designed to support not only SONET/SDH and Ethernet, but also high-definition video transmission. Next generation wireless infrastructure equipment is being designed to support both WiMAX and LTE (Long-Term Evolution).

Asynchronous Clocking

The simplest clock generation source is an oscillator (XO), which generates a single output frequency for a single component. XOs are oftentimes used in asynchronous applications, as shown in Figure 1. Each oscillator provides a local reference to maintain two independent clock domains. System operation requires XO frequencies be close but not identical. This architecture is ideal for burst-mode traffic applications. Continuous communication requires bit or packet stuffing and FIFO management to prevent overflow/underflow conditions.

Synchronous Clocking

Synchronous clocking is most often used in applications that require continuous communication. Network latency and variability in latency must be minimized. To accomplish this, applications including SONET/SDH, Synchronous Ethernet (SyncE), wireless backhaul, and video transport require that the source and destination operate at the same frequency. On the transmit side, the clocks that provide timing for the transmit path of the high speed SerDes are locked to a highly accurate reference clock. Both primary and secondary reference clocks are supplied from a centralized timing source (e.g. GPS). A PLL is used to lock to this backplane reference, attenuate jitter on the clock signal to remove unwanted noise, and provide a low jitter output clock to the PHY.

The PLL can be implemented discretely using an integrated clock IC or a Voltage-Controlled Crystal Oscillator (VCXO), phase detector, and loop filter. A discrete solution is preferable when the lowest possible jitter and best possible phase noise are required.

However, there are multiple disadvantages with a discrete PLL solution. A discrete PLL requires analog design expertise and is sensitive to board-level noise, so special care must be taken in the design and PCB layout. In addition, a discrete PLL typically provides a single output frequency. If the design's frequency requirements change, a separate VCXO must be sourced. In some applications, multiple VCXOs are required to generate all of the required frequencies in the application, increasing BOM complexity.

An alternate approach is to use a jitter attenuating clock multiplier IC, which integrates PLL circuitry on-chip. The clock multiplier maintains lock to the reference clock, filters unwanted jitter and generates a multiplied frequency output clock for the transmitter. Special care must be taken in clock multiplier IC selection, as all clock multipliers are not created equal. For high speed serial data transmission applications, only the highest performance clock multiplier ICs provide the jitter performance necessary to meet the end application requirements. The key specification is maximum jitter generation as opposed to typical jitter generation.

Lastly, a clock solution is preferable to a discrete solution when system-level clock functions are required. An example of this is hitless switching between input clocks, in which the clock monitors the quality of a primary reference clock and switches to a secondary reference upon detection of an alarm condition on the primary clock. Another popular system-level clock requirement is holdover, in which the clock continues to generate a stable output clock in the absence of a valid reference clock. Clocks are available from multiple suppliers that address these system-level requirements.

Silicon Labs – Crystal Oscillator and  SLIC

About the Author

Silicon Laboratories Inc. is a leading designer of high-performance, analog-intensive, mixed-signal integrated circuits (ICs) for a broad range of applications. For more information about Silicon Laboratories, please visit www.silabs.com.

[6th repost] How much time elapsed according to clock aboard aircraft?

There are two twin old-fashioned pendulum clocks
A and B, which run accurately on equator at rest.

http://en.wikipedia.org/wiki/Pendulum_clock

Clock A is taken aboard supersonic jet, which
cruises along equator around the Earth at low
constant altitude with constant speed v.

The second clock B is kept at rest at observatory,
located at equator.

When the jet roared above observatory the first
time the two clocks were syncronized.

The jet made one full loop and around the Eearth,
and when it passed above the observatory for the
second time, according to clock B the duration of the circumnavigation flight was To.

What was duration of the flight according to clock A?

The speed of low-orbit satellites is c~8km/s.
Ignore roatation of Earth.

The duration of the flight on clock A would appear to be

T_o [1 - (v/_sat)^2]^(1/2) or T_o [1 - (v/c)^2]^(1/2) in your tricky notation.

For a typical, just supersonic speed, this is a reduction in time apparently elapsed by just under 2 minutes.

I notice that no-one seems to have appreciated the relevance of your remark that the speed of a low-orbit satellite is ~ 8 km/s. However, it WAS very NAUGHTY of you to call that ' c ,' even if you thought that might be a subtle hint to look for a " relativistic-looking (v/c)^2" effect involving THAT ' c ' !

I will instead use v_s, for the satellite's speed, subscript ' s ' for satellite. I'll just use v for the plane's speed. I'll also ignore all SR and GR effects --- they are negligible in comparison with the main point at issue, which is the "effective g," g_eff, which is what determines the period of a classical pendulum clock.

[Actually, the "period" of a pendulum clock in such a satellite would NOT be infinite, but rather ~ 84 minutes, if you think carefully about it, though that is NOT for what you'd consider a classical pendulum motion, as it completes a full circuit in that time! Compared to 1/2 - 1 second, the typical period of an Earth-bound pendulum clock, that effectively is "infinite" of course, being > 5000 times longer.]

For anything orbiting the Earth with speed v, the effective gravity is given by

g_eff = g - v^2/r = g [1 - v^2/(rg)]

For an orbiting satellite, of course, (v_s)^2 / r = g, since it is the gravitational acceleration g which produces the centripetal acceleration of the satellite, (v_s)^2 / r.

Since 1/(rg) = 1/(v_s)^2, we can represent g_eff by

g_eff = g [1 - (v/v_s)^2].

Since the period P of a pendulum is given by

P = 2π √(L/g_eff), P is proportional to (g_eff)^(-1/2).

The period will therefore be lengthened by a factor

[1 - (v/v_s)^2]^(-1/2), or [1 - v^2/c^2]^(-1/2), in your tricky notation.

How large will this be? :

Let's take a just supersonic plane with v = 1200km/h. Then with v_sat ~ 8km/s, v/v_sat (your " v/c ") will be ~ 1/24. Then (v/v_s)^2 or (v/c)^2 ~ 0.001736. Since that is fairly small, we could reasonably well approximate the lengthening factor by the simpler expression 1 + 1/2 (v/v_s)^2 or 1 + 1/2 (v/c)^2. I'll compare these two estimates, below.

The accurate expression gives a factor 1.0008692... .

The first term approximation gives 1.0008681... .

Now here's one more slight twist. The elapsed time "shown by a clock" is actually INVERSELY PROPORTIONAL to its period. (It only recognizes that time has advanced by recording how many periods have elapsed.) So the time "showing" on clock A will be SMALLER than that on clock B by the factor given above.

So if the time recorded on the stationary pendulum clock B is T_o, the "time" recorded on the moving clock A on board the plane will be ~ T_o / 1.0008692... .

Since we're just looking at one example to get an order of magnitude, let's also see the order of magnitude by which clock A will apparently be running slow at the end of one plane circuit.

To a fair approximation, Earth's circumference is ~ 40,000km. So the plane would take 40,000/1,200hrs = 100/3 hrs, according to clock B. Approximate this by 33hrs.

Then clock A would show 33hrs / 1.0008692.. ~ 32.97134... hrs or 32h 58m 17s. (I'm keeping more figures because I want the difference.)

Thus clock A would appear to be slow by ~ 0.02866 hrs = 1.720min, or ~1min 43s.

Live long and prosper.

the most amazing RGB propeller clock ever seen

Tags: alarm clock clocky, clock, clock clock, clock clocks_per_sec, clock clock_t, design, flash, time, tools, world clock clock

This entry was posted on Tuesday, February 23rd, 2010 at 4:46 am and is filed under collectibles clocks. You can follow any responses to this entry through the RSS 2.0 feed. Both comments and pings are currently closed.